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MB85RS64A
■ BLOCK PROTECT
Writing protect block is configured by the WRITE command with BP1, BP0 value of the status register.
BP1 BP0 Protected Block
0
0
1
1
0
1
0
1
None
1800 H to 1FFF H (upper 1/4)
1000 H to 1FFF H (upper 1/2)
0000 H to 1FFF H (all)
■ WRITING PROTECT
Writing operation of the WRITE command and the WRSR command are protected with the value of WEL,
WPEN, WP as shown in the table.
WEL WPEN WP
Protected Blocks Unprotected Blocks Status Register
0
1
1
1
X
0
1
1
X
X
0
1
Protected
Protected
Protected
Protected
Protected
Unprotected
Unprotected
Unprotected
Protected
Unprotected
Protected
Unprotected
■ HOLD OPERATION
Hold status is retained without aborting a command if HOLD is “L” while CS is “L”. The timing for starting
and ending hold status depends on the SCK to be “H” or “L” when a HOLD pin input is transited as shown
in the diagram below. Arbitrary command operation is interrupted in hold status, SCK and SI inputs become
don’t care. And, SO becomes High-Z while reading command (RDSR, READ) . If CS is risen with hold status,
a command is aborted and device is reset.
C S
S CK
HOLD
10
Hold Condition
Hold Condition
DS501-00009-0v01-E
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